Selecting ESD Protection for HDMI 2.2 at 96 Gbps: Why Capacitance Alone Is Not Enough

A low capacitance value does not qualify an ESD protection device for an HDMI 2.2 design. HDMI Licensing Administrator states that HDMI 2.2 supports bandwidth up to 96 Gbps and that Ultra96 feature designations may identify 64, 80, or 96 Gbps capability. At these rates, the protection path must be reviewed as a complete RF structure: silicon, package, land pattern, branch geometry, return vias, connector, and channel.

The number printed in the capacitance row remains useful. It removes obviously heavy loads from a candidate list. The mistake is treating that number as a pass result. Two parts described as 0.1 pF can load a board differently when their test bias, measurement frequency, package inductance, pad geometry, or channel-to-channel coupling differs.

Start with the HDMI product mode, not a generic data-rate label

The official HDMI 2.2 overview describes a maximum bandwidth of 96 Gbps and identifies products that may operate at several maximum bandwidth levels. That system-level statement does not define a universal capacitance limit for a shunt protection diode.

A useful design input names the product mode that will actually be tested. Record the source and sink, resolution, refresh rate, color format, bit depth, cable, connector, retimer or redriver, PCB stack-up, and routing length. A design intended for a lower HDMI 2.2 bandwidth tier should not borrow a result from a different mode. A board demonstrated at one mode should not be advertised as validated for the maximum mode without a corresponding test.

This distinction matters during supplier review. “Suitable for HDMI 2.2” is a category claim. “Measured on board revision B at the stated mode, with the attached channel result” is engineering evidence.

A 0.1 pF entry leaves several questions unanswered

Capacitance is measured under stated electrical conditions. Reverse bias changes the depletion region. Frequency and signal amplitude influence the measurement method and the equivalent value reported by an instrument. An array also has coupling between adjacent signal paths that a single-junction value may not describe.

Ask the supplier to identify whether the value is typical or maximum, the frequency and bias used, the channel configuration, and the package represented. If the data sheet contains one typical number with no curve, use it for preliminary comparison only.

The package and board add their own parasitics. A short leadless package can still perform poorly when the signal route creates a stub, when the ground path uses a distant via, or when the footprint adds broad copper islands. At high frequency, the device and land pattern cannot be separated by assuming that the pad is an ideal node.

Audit the S-parameter reference plane before plotting S21

A Touchstone file is valuable because it can represent frequency-dependent behavior and multiport coupling. It is also easy to misuse. A clean plot does not reveal whether the test fixture, package land pattern, or launch was included.

Before importing the file, record its revision and checksum. Confirm the exact package suffix. Map every port and identify the ground definition. Ask whether fixture effects were removed and where the reference planes sit. Check that the frequency span covers the analysis being performed, and do not extend a file beyond its declared span without an explicit modeling rationale.

For an array, use the multiport file when it is available. Terminating unused ports incorrectly can create a comparison that no installed circuit reproduces. If only a two-port model is supplied, state that adjacent-channel coupling has not been evaluated by that model.

The simulation should include the proposed footprint and the route discontinuity. A useful comparison uses the same channel model with three branches: the unprotected baseline, candidate A, and candidate B. Report insertion loss and return loss together with the test fixture and calibration reference. A single favorable S21 trace can hide a return-loss problem or an asymmetric escape pattern.

Signal integrity and clamping must remain separate decisions

The least disruptive RF part is not automatically the best protective part. Reverse working voltage, breakdown behavior, polarity, dynamic resistance, peak clamping response, and the physical return path still control how the device handles a transient.

Device-level IEC 61000-4-2 claims are useful for supplier screening, but they are not a finished-product rating. The current division in a product depends on the connector shell, chassis, PCB planes, cables, and other interfaces. The voltage shown at a diode test point is also different from the voltage at the receiver pin because package and path inductance add voltage during fast current change.

A practical board review draws the ESD current path over the PCB layout. The route from connector to protection device and from device to its return should be visible without changing layers repeatedly or crossing a narrow digital-ground neck. The high-speed pair should remain symmetric. If an excellent RF route forces the transient current through the receiver reference, the layout has solved the wrong problem.

Use a reversible board comparison

An A/B/A test provides more confidence than comparing two boards built at different times. Fit candidate A on one controlled board and run the defined link measurements. Replace it with candidate B, then restore candidate A. Keep the source, sink, cable, connector, firmware, temperature, fixture, and instrument settings unchanged.

The restored A result checks whether rework, connector wear, calibration drift, or board damage produced the apparent improvement. If the difference between candidates is comparable to run-to-run variation, the report should say so. It should not assign a winner because one trace looks slightly smoother.

Save these items with the result:

1. PCB revision, stack-up, footprint revision, and high-resolution layout image;

2. full protection-device part number, lot identifier, and supplier file revisions;

3. HDMI operating mode, source, sink, cable, and firmware;

4. instrument, calibration, fixture, port map, and reference plane;

5. baseline, candidate A, candidate B, and restored-A measurements;

6. ESD test points, polarity, method, severity, count, and observed function;

7. post-stress leakage, link training, and any change in error behavior.

If the board passes the link test but fails ESD, review clamping and current return. If ESD behavior is acceptable but channel margin falls, investigate the footprint, branch length, package, and coupling. Combining both failures into one “device unsuitable” label discards useful evidence.

What a defensible supplier answer looks like

When a customer asks whether a device supports 96 Gbps HDMI 2.2, a responsible answer should carry conditions. It should identify the exact part and package, capacitance conditions, S-parameter file and reference plane, dynamic-clamping evidence, recommended layout, and the limits of the supplier test board.

ASIM manages protection data by orderable part number and file revision so that a customer can tie a simulation or measurement to the sample evaluated. The customer board still requires validation. A package change, footprint change, or relocation of the return vias can invalidate a previous RF result even when the silicon designation appears unchanged.

The final design statement should be narrow and reproducible: the named device, installed on the named board revision, met the specified link and ESD test conditions. “0.1 pF and 96 Gbps capable” omits the evidence needed to repeat that result.