How to Compare 24 V TVS Diodes

How to Compare 24 V TVS Diodes

2026.08.11 00:00:00
14

The ASIM SMA04J24V, SMB06J24V, and SMC15J24V share a 24 V VRWM and a 38.9 V maximum VC under stated conditions. Their IPP values are 10.3 A, 15.5 A, and 38.6 A.

The numbers are useful only with their stated current, waveform, temperature, frequency, and package conditions. A product selection begins with the actual electrical window and ends with board-level verification. It does not end with one favorable catalog value.

How should the comparison be read?

Start with normal operating voltage and the allowed fault condition. Then compare the maximum clamp voltage or impedance at the relevant test point. Check the package, return path, and channel structure before treating either part as a candidate. This sequence prevents a common error: choosing a device for one excellent number while ignoring the condition that made the number possible.

What changes on a real PCB?

Pads, traces, vias, cable position, and return inductance all change the result at the protected pin. A low-capacitance part on a long branch can still load a high-speed channel. A low clamp rating can still leave the IC with excess voltage if the return path is long. Use the real layout and measure both device terminals and the downstream node when margin is limited.

A practical verification sequence

  1. Freeze sample, load, cable, and operating mode.

  2. Test one part or one layout change at a time.

  3. Record waveforms, current path, function, leakage, and reset or error status.

  4. Restore the original configuration and repeat the test to confirm the change caused the result.

Common questions

Is the part with the lower published value always better?

No. Values must be compared at the same condition and against the actual system requirement.

Can package style decide the selection?

No. Package affects parasitics and assembly, but voltage window, clamp behavior, topology, and layout must also fit.

Why can a catalog-matched device fail in a product?

The full current path includes the enclosure, connector, cable, PCB, and protected circuit. Board-level validation is required.

What the 24 V package comparison actually tells you

The three ASIM parts are useful for a constrained comparison because the published working-voltage and clamp-voltage entries line up under the stated rating conditions. SMA04J24V is a 400 W SMA device with 10.3 A IPP. SMB06J24V is a 600 W SMB device with 15.5 A IPP. SMC15J24V is a 1500 W SMC device with 38.6 A IPP. All three list 24 V VRWM, a 26.7 V to 29.5 V breakdown range, and 38.9 V maximum VC at their respective pulse-current ratings.

That does not create a simple “larger package wins” rule. The protected circuit sees the system transient plus the voltage caused by the board path between the TVS, its return, and the IC. A controller placed several centimetres from the TVS can still see a high local excursion while the TVS terminal reading looks acceptable. The test probe ground lead can also create a misleading waveform. Use a suitable probing method and record the same measurement point for every candidate.

For a nominal 24 V input, first establish the highest continuous voltage at the board connector. Include supply tolerance, charging mode, load-dump assumptions where applicable, and any overshoot that exists in the actual product. VRWM must cover that continuous condition. Then compare the downstream absolute maximum rating with the clamp behavior at the pulse condition being evaluated. A TVS does not make a circuit immune to a sustained wiring fault; upstream fusing, current limiting, and thermal behavior remain separate design checks.

The package choice also changes layout reality. SMA takes less area and can be useful where the expected pulse energy and thermal path suit it. SMB provides a middle option. SMC needs more copper and spacing, but its higher listed pulse rating can be relevant when the validated transient calls for it. Do not replace an SMA footprint with an SMC assumption during a late ECO: land pattern, creepage, copper area, assembly profile, and the return connection all change.

Use this short release record with the waveform files:

  • actual maximum continuous input voltage at the connector;

  • selected model and the exact data-sheet condition used for VC and IPP;

  • fuse or current-limit location relative to the TVS;

  • voltage measured at the TVS and at the protected IC input;

  • function, leakage, temperature, and repeat-stress result.

The release decision belongs to the tested board configuration. A 24 V TVS comparison narrows candidates; it cannot replace the surge plan for the whole input stage.

Validation evidence for the release record

Use a fixed test configuration before comparing candidates. The record should name the sample revision, cable type and length, supply setting, load state, firmware version, ambient condition, and measurement point. Record the original waveform before changing the device or layout. Change one variable, repeat the same test, restore the original configuration, and repeat it again. This A/B/A sequence is more useful than a single improved screenshot because it exposes changes caused by cable movement, probe placement, or operating state.

Keep electrical evidence and functional evidence together. Electrical evidence includes the voltage at the entry and the protected pin, current where appropriate, and the exact pulse or discharge condition. Functional evidence includes communication errors, reset events, leakage, standby current, temperature, and recovery after repeated stress. A passed bench pulse does not close the review if normal operation is degraded. Conversely, a clean function test without the relevant electrical condition does not prove clamp margin.

The approved part number therefore belongs with a specific footprint and layout revision. If either the footprint, return path, cable arrangement, or downstream circuit changes, reopen the comparison and verify the affected condition again.

The final record should connect the selected model, its conditions, its PCB location, and the verification result.