How to Check Leakage in a 24 V TVS Diode

A 24 V TVS leakage check begins with the test condition, not with the nominal system label. ASIM SMA04J24V and SMB06J24V specify 24 V VRWM, a 26.7 V to 29.5 V breakdown range, and 1 microamp maximum reverse current at their stated rating condition. SMA04J24V is rated 400 W and SMB06J24V is rated 600 W. That catalog leakage value is a component condition; the measured standby current on a product also includes board surface leakage, capacitors, other branches, temperature, and the actual board input voltage.

Start with the protected circuit

The correct starting point is the pin or power node that must survive the event. Record the maximum normal voltage, polarity, power-up state, permitted overshoot, capacitance allowance, and the specified stress condition. A device must remain outside its conduction region during every normal operating state, rather than only at nominal voltage. For an interface, include cable presence, hot-plug behavior, pull-up or pull-down resistors, and all connected equipment. For a power input, include adapter tolerance, charge state, switching overshoot, and the input state after a load transition.

Published electrical values are useful when the conditions are kept attached to the number. Clamp voltage must remain paired with the pulse current and waveform. Capacitance must remain paired with its bias and test frequency. Leakage must remain paired with reverse voltage and temperature. These conditions prevent a familiar error: selecting one attractive catalog number while ignoring the condition that produced it. The protected IC margin is the engineering target, not a ranking table.

Read the PCB as part of the protection circuit

The protection component is only one branch of a fast current path. Connector geometry, pads, vias, trace length, reference planes, cable position, and enclosure connections all change the voltage seen downstream. Place the first protection branch near the point where the external energy enters the PCB. The return connection must be short and continuous to the intended reference. A long narrow return adds inductance during a fast event and can raise the voltage at the protected pin even when the component terminal reading looks reasonable.

For paired signals, preserve symmetry in pad exits, stubs, vias, and reference transitions. A low-capacitance device cannot correct an asymmetric breakout. For grouped channels, verify that every line is compatible with the array voltage window and return structure. If one conductor has a tighter bandwidth limit or a different fault consequence, split the protection scheme. Component count is not a reason to compromise an interface margin.

Use this review list before releasing a layout:

• normal and abnormal voltage on every protected line;

• selected model and the exact data-sheet condition used for each comparison;

• connector-to-protection and protection-to-reference routing;

• downstream voltage margin at the IC or converter input;

• signal, leakage, temperature, and repeated-stress observations.

Verify one change at a time

Board-level verification needs a stable baseline. Fix the board revision, cable type and length, supply, load, software, ambient condition, and measurement points. Capture the original behavior. Then change one device, one footprint, or one routing feature. Repeat the same test and restore the original configuration for a final repeat. An A/B/A sequence makes it easier to separate a real electrical change from a moved probe, a different cable position, or a different operating mode.

1. Define the pin margin and the test event before comparing candidates.

2. Measure at the protection component and at the protected node when the margin is limited.

3. Check function during and after the event, including communication errors, resets, leakage, and standby current.

4. Repeat the test under the most demanding valid cable, load, and operating condition.

Electrical evidence and function evidence belong in the same record. A clean waveform with degraded communication is not a release result. A device that allows the product to restart after a pulse still needs review against the product performance criterion and repeated-stress behavior. Keep the test configuration beside the waveform files so that a later layout or cable change can trigger the correct recheck.

What the part comparison cannot prove

No data-sheet comparison proves full-product immunity on its own. A listed IPP or peak-pulse rating is tied to a defined waveform. It does not replace the protection plan for a sustained fault. A listed reverse-current value does not describe contamination on a humid board. A package name does not establish the quality of its return path. These limits are not weaknesses in the data sheet; they define where product engineering work begins.

When the result disagrees with the expected catalog behavior, examine measurement method and physical path before changing the part again. Probe grounding, cable arrangement, enclosure contact, and a long branch often explain the difference. Record the investigation in terms that another engineer can repeat: location, condition, observed effect, one change, and retest result.

Common questions

Is the part with the lower clamp value always the better choice?

No. Clamp values must be compared at the same current and waveform, then checked against the actual downstream pin margin and PCB path. A lower number at a different condition is not a direct selection rule.

Can a package or channel count decide the choice?

No. Package affects layout and manufacturing; channel count affects topology. Working voltage, capacitance, return path, and fault isolation still need to fit the interface.

What should be kept with the released part number?

Keep the specified electrical condition, footprint and PCB location, sample configuration, waveforms, functional result, leakage or temperature data where relevant, and the repeat-test record. The released number belongs to that verified configuration.