Why TVS Diodes With the Same VRWM Have Different Clamping Voltages

Two TVS diodes can share the same reverse working voltage, or VRWM, and still show different clamping voltages. VRWM defines the continuous reverse-voltage boundary where the device is intended to remain off. Clamping voltage, or VC, describes the voltage across the device while a specified pulse current is flowing. They answer different design questions.

The VC number is incomplete unless it is paired with its test current and pulse waveform. A high-power TVS tested at hundreds of amperes may list a slightly higher VC than a small TVS tested at only a few amperes. That does not make the high-power part a worse clamp. It means the two figures were recorded at different operating points.

What do VRWM, VBR, and VC define?

VRWM is the maximum continuous reverse working voltage under specified conditions. The highest normal rail voltage, tolerance, ripple, charging state, and regenerative voltage should remain below it with usable margin. If the normal voltage sits too close to VRWM, leakage and temperature sensitivity can become practical problems.

VBR is the breakdown voltage measured at a stated test current. It marks the region where avalanche conduction becomes significant. VBR is not the voltage that the protected IC will necessarily see during a surge because voltage continues to rise as pulse current increases.

VC is the maximum clamping voltage at a specified peak pulse current. The protected MOSFET, converter, capacitor, or interface IC must tolerate this voltage plus the overshoot produced by PCB trace inductance and return-path impedance.

Why can equal-VRWM parts have different VC values?

The VC test currents may be very different

Consider two 24 V bidirectional ASIM TVS diodes. The SMA04J24B has a VRWM of 24 V and a breakdown range of 26.7 to 29.5 V. Its maximum VC is 38.9 V at an IPP of 10.3 A.

The 15KP24B also has a 24 V VRWM, with a breakdown range of 26.81 to 29.35 V. Its maximum VC is 40.7 V, but that value is specified at 371 A. Comparing 38.9 V with 40.7 V while ignoring 10.3 A versus 371 A would hide the main difference between the devices. Their packages, pulse capability, and intended installations are not interchangeable.

Dynamic resistance changes the voltage rise

A TVS in avalanche is not an ideal short circuit. A useful first-order model treats clamping voltage as an avalanche reference voltage plus pulse current multiplied by dynamic resistance. A lower dynamic resistance produces a smaller increase in voltage as current rises.

Some datasheets do not list dynamic resistance directly. It can be estimated from two points on the same clamping curve by dividing the change in voltage by the change in current. The estimate is only meaningful when pulse shape and temperature are comparable.

Die size and package affect current capability

A larger die can spread pulse current over more junction area. Package size also affects lead inductance, thermal mass, and the amount of energy the assembly can tolerate for a defined waveform.

The point becomes clearer within one 24 V family. The unidirectional SMA04J24V, SMB06J24V, and SMC15J24V all list a maximum VC of 38.9 V. Their corresponding IPP values are 10.3 A, 15.5 A, and 38.6 A. Equal VC does not mean equal pulse-current capability.

How should engineers compare TVS clamping performance?

Start with the threat waveform. An 8/20 microsecond surge, a 10/1000 microsecond pulse, and an automotive load-dump event place different thermal stress on the junction. Peak power values based on different waveforms cannot be treated as equivalent.

Estimate the current that will actually flow through the TVS using the surge source voltage, source impedance, cable impedance, and any intentional series element. Do not assume the part will operate at the maximum IPP shown in its table.

Read the candidate clamping curves near the estimated current. If only table values are available, record VBR, VC, the matching IPP, and the pulse waveform as a set. When test conditions differ, the responsible conclusion is that a curve or sample test is required.

Then include PCB overshoot. The protected-pin voltage is approximately the TVS voltage plus the inductive voltage produced by current slew rate and the resistance of the discharge path. A suitable device placed far from the connector can still allow a damaging spike at the IC.

How should downstream voltage margin be checked?

Use worst-case conditions

Use the highest continuous rail voltage, maximum credible pulse current, maximum specified VC, and the hottest relevant operating condition. A design that only passes with typical values has little production margin.

Measure at the protected component

Place the voltage probe at the protected power pin or signal pin instead of limiting the measurement to the TVS terminals. Use a short ground spring or a controlled coaxial connection. A long probe ground lead adds an inductive loop and can distort fast transients.

Record the complete setup

Document generator waveform, charge voltage, source impedance, cable length, operating state, TVS model, probe point, and polarity. That record makes replacement tests reproducible and prevents a layout change from being mistaken for a component improvement.

Common questions

Is the TVS with the lowest VC always the best choice?

No. A low VC helps the downstream circuit, but the part must remain off at the highest normal voltage and survive the required pulse. A low value obtained by selecting too low a VRWM can cause leakage, heating, or nuisance conduction.

Can IPP be calculated by dividing peak power by VRWM?

No. Peak pulse power is associated with clamping voltage and pulse current under a defined waveform. Use the datasheet's paired VC and IPP conditions.

Does a bidirectional TVS always clamp at a higher voltage?

No fixed rule applies. Polarity affects how the device handles positive and negative events, while VC also depends on voltage class, die design, package, and test current.

Why can a larger package have the same VC but a higher IPP?

The larger die and package can carry more current while keeping the avalanche voltage in a similar range. This is why voltage window and pulse capability should be selected as separate steps.

For a defensible comparison, ASIM recommends placing VRWM, VBR, VC, the associated IPP, waveform, and downstream absolute maximum rating in one table. The relationship between those values matters more than any isolated number.