Comparing ESD Diode Manufacturers with an A/B/A Sample Test

An A/B/A sample test can separate a component effect from a changing test setup. The method is simple: test the existing ESD diode as baseline A, replace it with supplier candidate B, then restore a fresh or retained baseline A device and repeat the same sequence. If the final A result does not reproduce the initial A result, the comparison is not controlled well enough to credit B.

This approach is useful when evaluating an ESD diode manufacturer because board tests are sensitive to contact condition, soldering, cable position, firmware state, temperature, gun tip location, and return geometry. A single A-to-B comparison can mistake one of those changes for a component improvement.

Write the acceptance rule before opening the samples

Begin with the failure that the project is trying to prevent. It may be permanent damage, a reset, a communication error, a false touch, an ADC shift, or excess residual voltage at a protected pin. Convert that problem into observable criteria.

The protocol should identify:

• the applicable pulse or system-level test method;

• discharge point, contact or air mode, polarity, level, and event count;

• cable, load, enclosure, grounding, firmware, and operating state;

• oscilloscope channels, bandwidth, probes, and trigger settings;

• electrical limits for VRWM, leakage, breakdown, capacitance, and clamp behavior;

• the functional performance criterion during and after each sequence.

Do this before learning which coded sample comes from which supplier. Otherwise the test can drift toward explaining the preferred result.

Match the part before comparing the brand

An A/B/A test is meaningful only if the candidate satisfies the circuit's basic constraints. Check polarity, channel configuration, pinout, package, working voltage, maximum leakage, capacitance, and clamp data under comparable conditions. A lower-voltage part may appear to clamp better while violating the normal-voltage requirement. A larger package may survive more energy but be impossible to place in the production footprint.

Record datasheet values with their conditions. A clamp voltage without pulse current and waveform is incomplete. Capacitance without bias, frequency, and test setup may not predict the high-speed interface. Leakage at room temperature cannot settle a hot high-impedance application.

Code the samples and control the rework

Label parts or boards with neutral codes. If package marking reveals the supplier, keep the person judging functional behavior separate from the person handling inventory when practical. The goal is not academic double-blinding; it is to reduce avoidable expectation bias.

Component replacement can change the board. Use the same rework profile, solder alloy, flux, cleaning process, inspection method, and cool-down time for A and B. Inspect pads and adjacent parts after each cycle. When rework damage is plausible, use matched boards and cross-check them rather than forcing repeated replacement on one footprint.

The final A step should be planned from the start. It can use a retained baseline board or a newly installed A device, but the choice must be documented. A fresh A tests repeatability across components and rework. A retained baseline board tests repeatability of the setup with less rework disturbance. Neither is perfect; stating the choice makes the evidence interpretable.

Run the same electrical sequence every time

A practical sequence is:

1. stabilize the board and record ambient or chamber temperature;

2. capture pre-stress leakage, supply current, and critical interface measurements;

3. apply the defined ESD or surge events in the fixed order;

4. record the waveform and functional response for every event or defined checkpoint;

5. repeat the electrical checks immediately after stress and after the specified recovery period;

6. move to the next coded condition without changing the fixture or software setup.

Randomization can reduce time-order effects when several boards are available. If all A tests occur in the morning and all B tests occur after the room or equipment has warmed, supplier identity is confounded with time. At minimum, log the sequence and temperature.

Preserve data at the sample level

Avoid reducing the comparison to “A failed, B passed.” Keep the observations that support the conclusion.

For high-speed ports, include eye, insertion-loss, or functional margin measurements if protection capacitance is a design constraint. For power or surge paths, include thermal and repeated-pulse behavior when the application requires it. The comparison must reflect the reason the component is in the circuit.

Interpret the second A before judging B

There are several possible patterns:

• A1 and A2 agree; B differs consistently. A component effect is plausible, subject to sample and lot coverage.

• A1 and A2 disagree materially. Setup drift, board variation, rework, environmental change, or stochastic behavior may dominate. Do not rank the supplier yet.

• B improves one metric and worsens another. Revisit the acceptance hierarchy. Lower residual voltage does not compensate for excessive leakage or signal degradation unless the project explicitly allows that trade.

• All samples vary widely. Increase sample size, separate lots, and examine fixture repeatability before using averages.

A/B/A controls drift; it does not establish production distribution. Supplier approval still needs an appropriate number of samples and lots, documented specification limits, traceability, and change control.

Add a lot and temperature extension

Once the bench method is stable, repeat the comparison across more than one lot and at relevant temperature corners. This is particularly important for leakage-sensitive inputs and applications operating close to a clamp or power limit.

Use a predeclared matrix rather than selecting only convenient results. List every planned board, lot, temperature, polarity, and stress sequence. If a test is omitted or invalidated, retain the entry and state why. Missing results are part of the evidence trail.

What a supplier should provide beside the samples

Ask each ESD diode manufacturer for the controlled datasheet revision, package drawing, qualification scope, lot identification, electrical test conditions, material or process change procedure, and any application-specific pulse data being used in the decision. When two documents use different conditions, do not merge the headline numbers into one ranking.

ASIM's ESD diode manufacturer page provides component and selection information for initial screening. The A/B/A method is the next step: it tests candidate behavior on the intended board while checking that the baseline remains reproducible.

A result that can survive a design review

A defensible conclusion names the conditions and limits. For example: “Under the stated board revision, fixture, operating mode, discharge sequence, and measurement method, coded candidate B produced the recorded results; baseline A was reproduced within the declared tolerance.” The actual data table should follow that statement.

Do not convert a small sample into a universal claim about a manufacturer. The test supports the application and lots examined. Broader approval requires additional coverage and ongoing incoming or production controls.

A/B/A ESD Diode Test FAQ

Why return to A after testing B?

The second A checks whether the setup and baseline remain reproducible. Without it, an apparent B improvement may have been caused by fixture, board, environmental, or software drift.

Can one board be reworked for every condition?

It can be used when the footprint and rework process remain controlled, but repeated heating and pad damage are confounding factors. Matched boards and inspection are safer when rework risk is high.

Does an A/B/A pass qualify the manufacturer?

Not by itself. It supports a controlled application comparison. Production approval also needs sample and lot coverage, specification review, traceability, and change management.