Can an ESD Diode Supplier SPICE Model Predict System Clamping Voltage?

An ESD diode supplier SPICE model predicts only the behavior encoded in that model. A DC or small-signal model cannot automatically predict the highest voltage at an IC pin during an IEC 61000-4-2 event. A transient model fitted to TLP data may describe device conduction over a stated current range, yet it still needs package, PCB, source, and victim models before it can represent system clamping.

This distinction is easy to miss because every simulator produces a precise plot. Precision on the screen does not create missing physics. Before accepting the peak voltage, identify the source waveform, the model reference plane, the parasitic network, and the node being observed. Device-pad voltage and IC-pin voltage are different quantities on a fast transient path.

Audit the model package before the schematic

Open the model file and its accompanying documentation before building a simulation. The package should identify the complete orderable part number, model revision, release date, supported simulator or syntax, intended analysis, and applicable temperature or bias range. A generic filename that covers several packages without a package model leaves an important reference-plane question unanswered.

Four data types frequently appear in supplier model packages. They serve different jobs:

A model that converges is not necessarily a validated model for the requested problem. If the supplier does not state the fitted measurements, operating range, or reference plane, retain the simulation as exploratory work. Do not use it as a guaranteed maximum in a component qualification record.

DC I-V, TLP, and IEC 61000-4-2 are separate evidence

A DC sweep describes relatively slow current-voltage behavior. It can support checks around reverse working voltage and the breakdown region at a specified test current. Transmission line pulse testing applies a controlled device-level pulse and can reveal a clamp curve, a fitted dynamic resistance, and electrical change near a stated failure criterion. IEC 61000-4-2 applies a system-level discharge to equipment or a coupling structure and judges the equipment response under a defined setup.

The three methods share voltage and current units, but they do not share a source, fixture, time scale, or pass criterion. Two shortcuts therefore fail. Static breakdown voltage is not the fast peak clamp. A TLP current is not convertible into a contact- or air-discharge voltage rating for a finished product.

The report review must keep the method attached to every number. ASIM's guide to reviewing an ESD diode supplier TLP report explains why It2 and dynamic resistance remain report-defined quantities. Those values should not become unconditional constants inside a simulation deck.

The PCB adds voltage outside the diode model

A compact path model can be written as:

VIC ≈ Vdiode + Lpath × di/dt + Vreference

Vdiode is the voltage at the protection-device terminals. Lpath × di/dt represents voltage added by the connector path, pads, vias, package, and return path during a rapid current change. Vreference represents movement of the local reference at the protected IC. The expression is a bookkeeping aid, not an exact calculator when current division and frequency-dependent parasitics remain unknown.

An ideal wire in SPICE removes the very effect that often separates a catalog curve from board behavior. A long branch from the connector to the diode allows the transient to travel farther into the board. A remote ground via raises return-path inductance. A protection device connected to digital ground while the main discharge current belongs on chassis can move the IC reference. None of these effects is repaired by selecting a more sophisticated diode symbol if the surrounding network is absent.

Measurement locations need the same discipline. A probe across the diode pads reports device-terminal behavior plus the measurement fixture. A probe near the victim IC reports a different node and reference. The ASIM article on where to measure ESD residual voltage separates those two observations and their limitations.

Define the source instead of drawing a generic pulse

An IEC generator contains a charged network and produces a specified current waveform under calibration conditions. Replacing it with an arbitrary voltage pulse and zero source impedance can force unrealistic current through the protection device. The resulting clamp plot may be numerically clean while being physically unrelated to the test.

For a repeatable model, record the source waveform, source impedance, polarity, repetition, and calibration reference. State whether the purpose is to reproduce a TLP data point, compare two board paths under a common assumed pulse, or approximate a system event. These are legitimate but different analyses.

Air discharge needs extra caution. Arc inception depends on geometry, distance, environment, and approach. A supplier diode model does not describe the air gap unless a separate, validated discharge model is present. Contact discharge is normally the more controlled basis for correlation work, but even then the complete current return and equipment configuration matter.

A simulation record needs more than a screenshot

Retain the inputs required for another engineer to rerun the result:

1. full diode order code, package, model filename, revision, and file checksum;

2. pulse definition, impedance, amplitude, polarity, and repetition rule;

3. parasitics from connector to diode, diode to return, and diode to victim;

4. named observation nodes and their reference nodes;

5. temperature, DC bias, load, and victim-pin model;

6. origin of every parasitic value: measurement, extraction, supplier data, or estimate;

7. solver settings and time step where they affect a fast edge.

When the victim-pin model is unavailable, the simulation can still compare two protection layouts under identical assumptions. Label that result as a relative comparison. It does not establish the maximum voltage accepted by the actual IC. When board parasitics are estimates, use a range rather than a single optimistic value and identify which assumption controls the result.

Correlate in three stages

Start with component evidence. Check normal operating voltage, leakage, capacitance or S-parameters, and pulse data before spending time on a model that does not fit the interface. Then correlate the model on a test coupon or representative board. Measure at the diode reference plane and near the protected node, using a measurement method whose loading and common-mode limits are understood.

The final stage is the assembled product. Restore the enclosure, cables, load, firmware state, and intended grounding. Apply the specified discharge points and functional criteria. A model-to-coupon match does not prove that a cable shield, enclosure seam, or common power path will remain quiet in the product.

The pattern of disagreement is diagnostic. If simulation and coupon differ, review model limits, fixture de-embedding, probe loading, and extracted parasitics. If coupon and simulation agree while the product fails, investigate the enclosure, cables, common references, and secondary coupling paths. Do not tune the diode model to hide a system path that the model was never intended to contain.

Write conclusions that preserve the evidence boundary

A reviewable statement names the model revision, input condition, reference plane, and correlation status. For example: “Under the stated source model and extracted PCB network, model revision X produced the reported voltage at node Y; coupon measurement at the same reference plane agreed within the recorded measurement uncertainty.” That statement can be challenged and repeated.

“Simulation proves 8 kV IEC compliance” cannot be repeated from the SPICE file alone. It skips the generator setup, enclosure, discharge location, current distribution, operating mode, and performance criterion. A supplier model supports engineering decisions when its limits are visible. It becomes misleading when a device-level curve is presented as a system certificate.

ASIM manages model files, TLP information, S-parameters, and datasheets by complete device designation and revision. A customer qualification record should bind those files to the sample lot, PCB revision, and test record. The related guide to ESD diode manufacturer test reports shows how to keep device and system evidence in separate columns.