How do you choose between unidirectional and bidirectional ESD protection diodes?

Let’s clarify the selection criteria first: consider whether the normal voltage of the protected line relative to ground crosses 0V. For signals like 0–3.3V GPIOs, where no significant negative voltage occurs during normal operation, a unidirectional ESD device is usually more suitable; however, if the signal itself swings between positive and negative voltages—such as an analog signal ranging from −2.5V to +2.5V—you must choose a bidirectional device capable of covering the entire voltage range.

What is being observed here is the "line-to-ground voltage"—not the nominal power supply rating, nor the differential voltage between the lines. Differential interfaces are particularly prone to misinterpretation at this stage; the fact that the differential amplitude between the two lines is small does not mean that one of the lines lacks a negative voltage swing relative to ground. Factors such as common-mode voltage, bias, hot-plugging events, overshoot, and undershoot must all be taken into account.

Don't be misled by the names "one-way" and "two-way".

Unidirectional ESD diodes are not limited to handling electrostatic discharge in only one direction. When subjected to a positive surge, a typical unidirectional structure enters the avalanche region, whereas it dissipates current via forward conduction when exposed to a negative surge. In contrast, bidirectional structures maintain an operating window for both positive and negative polarities, making them suitable for AC and bipolar signals.

The real difference between the two lies in their normal operating voltage ranges and current-voltage characteristics, not in whether or not they can protect against negative-polarity ESD. Likewise, being bidirectional does not equate to superior protection capability. To determine the actual clamping level, one must consider the specific device's test current, pulse conditions, and the PCB circuit configuration together.

Pay attention to the internal structure as well. Some products feature a back-to-back configuration, others utilize rail-to-rail clamping, and some are designed as multi-channel arrays. Relying solely on the product name or package symbol can easily lead to errors in identifying pin orientation and discharge paths. When selecting a component, you must at least verify the internal circuitry, pin definitions, and grounding method.

When replacing an existing part number, one cannot simply rely on a "unidirectional-for-unidirectional" or "bidirectional-for-bidirectional" swap. Even if the package and VRWM match, parameters such as VC, Cj, leakage current, and pin assignments may still differ. Upon receiving the substitution list, the procurement team should ideally have hardware engineers verify the electrical specifications; conversely, the engineering team should not merely provide the original part number but should at least specify the interface type and operating window.

After obtaining the API parameters, I generally evaluate them like this:

First, fully determine the normal voltage range. Steady-state voltage is merely the starting point; the minimum and maximum voltages (Vmin and Vmax) during startup, shutdown, and hot-swapping must also be recorded. In the absence of actual waveforms, you can make an initial selection based on the chip's electrical limits and then verify the measurements once the prototype is available. For unidirectional devices, the biggest risk is overlooking normal undershoot: if the protection device triggers prematurely while the signal is active, the result can range from waveform distortion to direct interface malfunction.

Next, consider VRWM and VC. VRWM must exceed the maximum voltage likely to occur during normal circuit operation, yet without incorporating unnecessary margin. Selecting an excessively high operating voltage typically raises the protection threshold. VC must be evaluated against the transient voltage tolerance of downstream chips; however, one cannot simply compare the numerical values of VC across different devices, as differences in test currents and pulse conditions mean the figures are not directly comparable.

For high-speed interfaces, one must also consider Cj—that is, junction capacitance. Excessive capacitance increases the load on high-speed signals, potentially affecting the eye diagram, rise times, and return loss. Cj values depend on the test frequency and bias conditions. A device labeled "low capacitance" is not necessarily suitable for every high-speed interface.

Selecting the components is only half the job. ESD devices should be placed near the point of ESD entry; the signal path should pass through the protection node before reaching the interface chip, and the ground loop must be kept short. The component's rated ESD immunity level cannot substitute for the system-level result, as the enclosure, connectors, PCB traces, and grounding all influence actual performance.

A few common questions

Can unidirectional ESD diodes protect against negative ESD strikes?

Yes. Under a negative surge, the typical unidirectional structure dissipates current via forward conduction. Protection effectiveness also depends on negative clamping characteristics, current magnitude, and the return path on the PCB.

Are bidirectional ESD devices necessarily better suited for high-speed interfaces?

Not necessarily. High-speed interfaces are more concerned with junction capacitance, package parasitics, channel matching, and PCB layout. Both unidirectional and bidirectional device categories include low-capacitance products designed for high-speed lines.

Can bidirectional devices be used for unipolar signals?

Yes, though it may not always be the most cost-effective choice. Beyond verifying the working peak reverse voltage (VRWM) and junction capacitance (Cj), one must also consider whether the negative clamping performance is suitable for the downstream chip. If the downstream component is sensitive to negative voltage, a unidirectional structure can sometimes be more effective at suppressing negative voltage levels.

Does a component passing IEC 61000-4-2 testing guarantee that the entire system will pass?

Not necessarily. Component-level testing and system-level testing differ in terms of signal paths, physical structure, and the specific criteria being evaluated. Factors such as connector placement, discharge points on the enclosure, ground impedance, and TVS layout all influence the final system-level test results.

When submitting specifications for component selection, do not simply state "3.3V interface." Providing details such as Vmin, Vmax, interface data rate, downstream voltage tolerance, target test level, and package constraints will significantly speed up the selection process. These are also the key parameters engineers need to verify when seeking assistance with component matching.